An analog-to-digital converter (ADC) is a part of many microcontrollers. Conventional embedded ADC solutions have a good sample rate but poor resolution. One reason for poor resolution is that cost increases exponentially with increased resolution. Each extra bit of resolution can double a requirement on linearity and accuracy of an analog design. By contrast, sample rate does not increase cost exponentially and thus is easier to improve in an ADC design.
For ADC applications that do not need a fast sample rate, an excess sample rate can be traded for better resolution, given that the input signal is not too slow and that the linearity of the ADC is good. Trading sample rate for resolution can be accomplished by oversampling the ADC input signal and then averaging the result. Oversampling lowers the noise floor in the pass band of interest. In general, the signal-to-noise ratio (SNR) increases by 3 dB or 0.5 bits for every doubling of sample rate.
A slowly changing ADC input signal can pose a problem. For averaging to work, the ADC input signal should trigger different quantization codes. If the ADC input signal is more or less static, then no matter how many samples are averaged, resolution may not be increased beyond the native resolution of the ADC. To address this issue, dither noise can be added to the ADC input signal.
While oversampling can interpolate between ADC codes, it may not improve the integral non-linearity (INL) of the ADC. If the ADC is nonlinear, then the oversampled result will be equally nonlinear. This keeps the Effective Number of Bits (ENOB) from improving, even though the relative resolution has improved.
Adding dither noise and compensating for bad ADC linearity can be expensive. For example, adding dither noise may require a fast noise source that is white and a circuit of active and passive components to amplify and superimpose this dither noise on the ADC input signal. The dithering circuitry can be calibrated at production so the level of dither noise superimposed on the ADC input signal is within about +/−1 LSB. Adding more dither noise than 1 LSB may not affect quantization noise removal, but may instead decrease the SNR.
Correcting for INL errors can include characterizing the ADC using a more accurate ADC or DAC. Characterization information can be stored on the device and used to digitally correct each ADC sample for INL error. Characterizing can be performed in production and the correction information (e.g., a compensation table) can be stored on the device. However, characterizing during production and storing the correction information on the device can increase cost.